For obtaining a high breakdown voltage in a high breakdown voltage semiconductor element, the drift region of the element must be made to have high resistivity so as to correspond to high breakdown voltage. Moreover, the width in the direction of the main current path needs to be large. This increases the voltage drop more in the section of the drift region of the element having higher breakdown voltage, making the on-voltage higher (i.e., larger on-resistance). In other words, there is a tradeoff relationship between increasing the breakdown voltage and reducing the on-resistance. Therefore, it is generally considered that both the breakdown voltage and the on-resistance cannot be easily improved.
One way of solving the above problem is to use a semiconductor superjunction device. Known semiconductor superjunction devices will be briefly explained below. For example, JP-A-9-266311 (Reference 1) discloses a semiconductor superjunction structure having parallel p-n layers in the drift region. In the parallel p-n layers, thin current path regions with the conductivity type the same as that of carriers and regions with the conductivity type opposite to that of the thin current path regions are alternately laminated or layered. Both regions are arranged parallel to the drift direction of the carriers (i.e., the direction of the current path) with impurity concentrations made higher than that in the drift region. This allows current to flow in the current path region with the impurity concentration determined to be high, by which the on-voltage is decreased, and in the off state, all the parallel p-n layers are depleted to achieve the object of obtaining higher breakdown voltage.
Moreover, JP-T-2000-504879 discloses solving the problem similar to the problem described in Reference 1, in a device such as a MOSFET or an IGBT. Here, the device is provided as a field effect semiconductor device having in a drift region (inner zone), a superjunction structure provided with p-zones (depletion zones), and n-zones (complementary depletion zone) with amounts of dopants equal to each other.
Furthermore, JP-A-2003-124465 discloses a superjunction structure provided with parallel p-n layers having the function similar to that of the p-n layers disclosed in Reference 1, but formed in concentric circles. No end faces of the respective p-regions and n-regions, however, are presented. This eliminates electric field concentration at the boundary section between the region of the parallel p-n layers and a peripheral structural section to largely improve the tradeoff relation between the breakdown voltage and an on-voltage.
Still further, JP-A-10-223896 discloses a high breakdown voltage semiconductor device having excellent on-voltage and breakdown voltage characteristics by forming a superjunction structure made up of a repeating structure of p-n layers, each having a fine width of the order of micrometers in the drift region.
Moreover, JP-A-2004-342660 discloses a power MOSFET having a superjunction structure formed with the widths of respective n-type pillar layer and p-type pillar layer, formed in a sidewall of a trench, considerably reducing its size. Here, the channel density of the structure can be increased. This makes low on-resistance well compatible with high breakdown voltage, as well as further improving the on-resistance.
Furthermore, Tatsuhiko Fujihira, Theory of Semiconductor Superjunction Devices, Japanese Journal of Applied Physics, Vol. 36 (1997) pp. 6254-6262, discloses a theoretical analysis of breakdown voltage and on-resistance of a semiconductor device provided with a superjunction structure.
All the above-described superjunction structures are based on the following principle. A width of each linear region (a width in the direction perpendicular to the drift direction of carriers) in the parallel p-n region is made narrower to increase the arrangement density of each of p-type and n-type regions in the superjunction structure in the drift region. Further, the impurity concentrations in the p-n region are increased to make the low on-voltage characteristic and the high breakdown voltage characteristic compatible. Each of the related superjunction structures can increase the upper limit of doping concentration with impurities by further narrowing the region widths of the respective p-type and n-type regions arranged in parallel to obtain the desired result of high breakdown voltage and low on-resistance. Nonetheless, the following limitation exists with respect to improving that tradeoff relationship on the extrapolation of such principle. Increasing the impurity concentration by narrowing the region width for reducing the on-resistance can cause saturation to gradually appear in the way of the reduction of the on-resistance with the presence of the limit of the region width (impurity concentration value) that causes increase in the on-resistance for further narrowed region widths.
The reason for the increase in the n-resistance is considered to be due to the influence of decreasing mobility of the carriers becoming so large in the region with the impurity concentration above the threshold value, interrupting the reduction of on-resistance, namely actually increasing the on-resistance. For example, in the case of silicon semiconductor, it is known that an impurity concentration above 5×1016 cm−3 begins to considerably decrease the mobility of conduction carriers, whether electrons or holes, and the impurity concentration reaching 1×1018 cm−3 decreases the mobility by approximately one order of magnitude as compared with the mobility in an intrinsic semiconductor. See for example FIG. 3 in 2.1.1 of S. M. Sze, Semiconductor Devices, Wiley (Sangyo Tosho-sha, Japanese translation). On the basis of the publicly known fact, the cause of the decrease in the mobility is considered to be due to scattering resulting from crystalline defects caused by ionized impurity scattering due to doped impurities and highly concentrated impurities. That is, referring to FIGS. 11A and 11B, when the width dp of the p-region 1 and the width dn of the n-region 2 in the parallel p-n region shown in FIG. 11A are narrowed to as shown in FIG. 11B, with the impurity concentrations of the respective p-type and n-type regions increased for the purpose of improving both the breakdown voltage and the on-resistance, scattering caused by ionized impurities and crystalline defects due to the scattering are increased to decrease mobility of carriers. This effect gradually grows with the decrease in the region widths and the increase in the impurity concentrations in both regions, interrupting the reduction of the on-resistance.
Furthermore, in a normal p-n junction, across the junction between the p-type region 1 and the n-type region 2 and adjacent to each other, a built-in voltage relating to the impurity concentrations in both regions is always presented with a certain small width without applying any bias voltage. By the built-in voltage, a depletion layer is formed with a certain small width (in FIGS. 11A and 11B, the width of the depletion layer spreading on both sides of the junction is shown by a double headed arrow 4). Therefore, when the respective region widths (dp and dn) of both the p-type region 1 and the n-type region 2 are minimized further than the widths at which reduction in the on-resistance is interrupted, the p-n junction is brought into a state in which the width 4 occupied by the depletion layer cannot be negligible. In this case, large resistance of the depletion layer narrows the path regions of effective on-currents and transit regions of carriers in the p-type region 1 and the n-type region 2. As a result, the on-resistance begins to increase. Moreover, further narrowed region widths (dp and dn) cause the whole bulk to be always left depleted. This makes current flow as little as that of an intrinsic semiconductor, which results in an abrupt increase in the on-resistance.
As previously explained when improving the tradeoff relationship between increasing the breakdown voltage and reducing the on-resistance by narrowing the region widths of respective p-type and n-type regions, there is a limit as to how much they can be narrowed before the improvement starts decreasing.
Accordingly there is a need to remove the lower limit so that the tradeoff relationship can be further improved. The present invention addresses this problem.